Wafer bonding is a packaging technology on wafer-level for the fabrication of microelectronics and optoelectronics devices. The wafer bonding ensures mechanically stable packages. The bonding process can be, for example, direct bonding, oxide bonding, adhesive bonding, thermal bonding, etc.
Wafer bonding can offer many advantages with respect to through silicon via scaling. However, challenges from strain involved with wafer bonding can affect process yield in a negative way, leading to broken wafers, delamination, etc. For example, chip dicing following the conclusion of wafer stacking can pose a risk of cracking and/or damage to the stacked structure. In addition, or alternative, thermal processes can result in cracking or delamination during the manufacturing processes due to coefficient of thermal expansion (CTE) mismatch of materials.